Package & board / 06
PCB Manufacturing Variation: Etch, Glass Weave, and Impedance
The board you get is not the board you drew. Traces come out narrower and trapezoidal, dielectric thickness varies with resin flow, and the laminate's dielectric constant depends on where the glass weave happens to sit. All of it moves impedance and delay — and a design that only works at nominal is a design with a yield problem.
When an engineer exports Gerber or ODB++ production files from an EDA tool, the geometry looks mathematically pristine: copper traces have perfectly rectangular cross-sections with vertical sidewalls, dielectric cores are modeled as completely flat and homogeneous, and layer thicknesses are pinned to the exact micrometre. But printed circuit boards are not precision-machined in a cleanroom; they are mass-produced through an aggressive sequence of chemical acid baths, high-pressure hot lamination presses, and mechanical drilling spindles.
In the fab shop, chemistry and fluid dynamics immediately begin distorting that CAD perfection. Liquid etchant sprays attack copper sideways beneath the photoresist mask as well as downwards, turning sharp rectangular traces into sloping trapezoids. Viscous epoxy resin liquefies under hundreds of pounds of lamination pressure, flowing unevenly into gaps between copper features and causing dielectric thickness to fluctuate across the panel. And the core laminate itself is not uniform plastic — it is a woven textile of glass yarn bundles embedded in resin, creating a microscopic grid of fluctuating dielectric permittivity.
These manufacturing spreads are not minor aesthetic artifacts; they represent the primary variance in high-speed link margins. A mere 0.5 mil etch variation can swing characteristic impedance by 5 Ω, consuming half of your standard ±10% tolerance window before components are even soldered. Meanwhile, glass-weave skew can desynchronize a 32 Gbps differential pair by several picoseconds, converting differential data into destructive common-mode noise. Surviving bring-up requires designing for the board the factory actually builds, not the idealized model in your CAD tool.
Why a drawn dimension is not a built one
A board is manufactured by chemical and mechanical processes, and processes have spread. Three of them matter electrically, and it is worth knowing what each one physically does.
Etching removes copper by dissolving it, and the etchant attacks from the top and the sides at the same time. So a finished trace is trapezoidal rather than rectangular, and narrower at the top than the artwork. How much narrower depends on copper weight, position on the panel, and the fabricator's process.
Lamination presses prepreg between the layers, and the resin flows under heat and pressure. How far it flows depends on how much copper is nearby, so dielectric thickness varies across a board — thinner where there is more copper to flow around.
The laminate itself is not uniform. It is glass fibre woven into bundles, set in resin, and the two materials have different dielectric constants. A trace over a bundle and a trace over the gap between bundles see different effective Dk.
Etch: the trace you get is not the trace you drew
Etching removes copper from the top down and sideways at the same time, so a finished trace is trapezoidal rather than rectangular, and narrower at the top than the drawn width. Etch factor varies with copper weight, with position on the panel, and between fabricators.
The electrical consequence is impedance. A narrower trace has less capacitance to the plane and therefore higher Z0, so etch variation shows up directly as impedance variation — and it is one of the larger contributors to the ±10% tolerance that controlled-impedance builds are specified to. The fabricator compensates by adjusting the drawn width to hit the target after etch, which is why the artwork width and the specified width are not the same number.
Dielectric variation
Laminate Dk is quoted as a single number and behaves as a distribution. It varies with the ratio of glass to resin, which varies with how the prepreg flowed during lamination, which varies with what copper was underneath. A dense plane area and a sparse routing area press differently, so the same board has different dielectric thickness — and therefore different impedance — in different places.
This is what impedance coupons are for: a test structure on the panel edge, measured by TDR, that demonstrates the build hit its target. Worth knowing that a coupon proves the panel, not your trace, and it is measured in a location chosen for convenience.
The fixes are all upstream of layout: route at an angle to the weave (10–15° is enough), specify a spread or flattened glass style so the resin-rich and glass-rich regions are smaller than the trace, or use a mechanically-spread laminate. All three are stackup or fabrication decisions.
What to do about it
Simulate at the corners, not the nominal — and be specific about which corners actually co-vary. Get the directions right first, because they are easy to state backwards: at fixed everything else, a thinner dielectric brings the trace closer to its reference, raises the capacitance per unit length and so lowers Z₀; a narrower trace has less area facing the plane, less capacitance, and so raises it. They push in opposite directions, not the same one.
That is what makes the real worst case a question about covariance rather than about extremes. Thin and wide is the low-impedance corner; thick and narrow is the high one — and each is a single coherent process outcome. Stacking every parameter at its individual worst value without asking which ones move together can produce a combination that the manufacturing process does not create and a limit the design does not need.
Then decide what the tolerance is worth. Tightening controlled impedance from ±10% to ±7% costs real money on every board built. It is worth it on a channel that is genuinely reflection-limited, and it is worth nothing at all on one that is loss-limited — where the same money spent on a lower-Df laminate would buy far more margin.
Why this decides how your board behaves
- Impedance moves, so reflections appear. A ±10% impedance window is a reflection of up to about 5% at every transition into a terminated part, and that is in your budget whether you accounted for it or not.
- Delay moves, so length matching drifts. Dk sets velocity, so a laminate that came in high is a board where every matched length is slightly wrong.
- Glass weave breaks pair symmetry. The two halves of a differential pair can sit over different amounts of glass and genuinely propagate at different speeds — skew that no amount of serpentine matching fixes.
- It explains board-to-board variation. The classic "works on some units" failure is usually tolerance, and looking for a design error instead can consume weeks.
What to do about it
Simulate at the corners, not at nominal. A design that only closes at nominal impedance will have a yield problem, and the symptom will look like a marginal, lot-dependent failure rather than an impedance one.
Specify impedance and tolerance, let the fab solve for width. Fixing the width and hoping means you get the width you asked for and the impedance you did not — which is why artwork width and specified width are different numbers.
Address glass weave at the stackup, not the layout. Spread-glass styles, or routing at an angle to the weave, are the fixes. Both are decided before layout.
Ask for coupon data, by lot. When boards behave differently, the impedance coupons are the fastest way to find out whether the boards were different.
- Some boards pass and some fail, same design. Get the coupon data for both lots before changing anything. This is tolerance until proven otherwise.
- Intra-pair skew with perfectly matched lengths. Glass weave. Check the routing angle relative to the weave direction.
- Impedance off in one region of the board. Resin flow — look at the copper distribution nearby, since thickness varies with how much copper the resin had to flow around.
- Delay longer than the model, uniformly. Dk came in high. It scales every length on the board by the same ratio, which is a useful signature.
Go deeper — which direction each variation pushes, and why they do not simply add
The signs matter, because they decide whether two variations reinforce or cancel:
- Over-etch → narrower trace → less capacitance to the plane → higher Z0.
- Thinner dielectric → plane closer → more capacitance → lower Z0, and a shorter return loop.
- Higher Dk → more capacitance → lower Z0, and a slower wave.
- Thicker copper → more cross-section → lower conductor loss, but also a larger etch factor, so the two partly offset.
Why they do not simply add. A worst-case analysis that stacks every variation at its limit in the same direction is usually far too pessimistic, because the variations are not independent. Resin flow depends on copper distribution; Dk depends on the glass-to-resin ratio, which is the same quantity that sets thickness. Some of them are correlated, and some are anti-correlated.
Which is why a serious tolerance analysis is statistical rather than worst-case: sample the distributions, respect the correlations, and look at the resulting spread. Stacking limits gives a number that no board will ever exhibit and can lead you to over-design expensively.
And the one that is genuinely not a distribution. Glass weave skew is not a random spread around a mean — it depends on where a specific trace happens to sit relative to a specific weave, which is essentially arbitrary and can differ between two pairs on the same board. It is better treated as a bounded worst case than as a tolerance.
In the real world
Tolerance is the difference between a design that works and a product that ships. A prototype that passes is one sample from a distribution, and the interesting question is always what the rest of the distribution does.
Which makes coupon data one of the more valuable things you can ask for routinely rather than only in a crisis. A few builds' worth of impedance measurements tells you what your actual spread is, and whether the ±10% you designed against is generous or optimistic for the fabricator you are using.