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Package & board / 05

High-Speed Connectors and Cables

A connector vendor characterises their part carefully and publishes S-parameters for it. What they cannot characterise is your footprint — the pads, the via pattern behind them, the antipads those vias cut in your planes. That region is typically a worse discontinuity than the connector itself, and it is entirely yours.

The footprint is worse than the connector
the launch — the part the vendor cannot characterise antipad stub below the exit layer trace pads · vias · antipads · approach geometry — all yours and half the channel belongs to somebody else board cable — worst compliant board launch launch beyond loss, a cable brings: · intra-pair skew → mode conversion · sample-to-sample variation · bend radius, temperature, mating cycles
Connector vendors characterise the part, while the board design determines the footprint and launch. The pad geometry, via pattern, plane antipads, and approaching trace can form a larger discontinuity than the connector itself. Because the launch is three-dimensional, use a 3D model for it, then cascade that result with the vendor's connector model and a 2D model of the uniform trace. For a cabled interface, close the budget against the worst compliant cable and include mated-pair variation, since assemblies built from identical parts do not measure identically.

On an engineered circuit board, maintaining signal integrity discipline is largely a planar problem. Stripline differential pairs maintain uniform conductor widths, consistent dielectric spacing, and solid, unbroken reference planes across many inches of board real estate. But the moment a signal must leave the board — plugging into a card-edge slot, mating with a backplane, or transitioning into a twinaxial cable assembly — that tidy two-dimensional planar discipline violently breaks down.

A connector is an inherently three-dimensional mechanical structure. Within a physical volume of only a few cubic millimetres, planar PCB traces must neck down onto surface-mount pads or press-fit compliant pins, transition into stamped metal spring contacts, pass through molded liquid-crystal polymer (LCP) plastic housings, and mate with the opposing pins of another subsystem.

Because of this radical geometric transformation, connectors and their cable assemblies represent the single largest impedance discontinuity in almost every high-speed channel. The critical engineering trap is treating a connector as a standalone, modular component that can be judged purely by a vendor's Touchstone S-parameter file. In live hardware, the vendor's model only represents the middle of a complex mechanical sandwich. The worst part of the discontinuity — the surface breakout pads, the ground-perforating via field, and the antipad tuning — is completely owned by your board layout.

Where a connector actually begins and ends

It is tempting to think of a connector as a component: it has a part number, a datasheet and a set of S-parameters, so it should drop into a channel model like any other block.

Electrically it does not, because the discontinuity does not start at the connector's contacts. It starts where your trace geometry changes to approach the pads, continues through the vias behind them, and only then reaches anything the vendor modelled. The vendor's file describes the middle of a structure whose ends you built.

So the useful mental model is not "connector plus board" but a launch, a connector, and another launch — three things in series, of which you own two.

The footprint, not the part

Connector vendors characterise their parts carefully and publish S-parameters for them. What they cannot characterise is your footprint: the pad geometry, the via pattern behind it, the antipads those vias cut in your planes, and the trace geometry approaching the launch. That region is typically a worse discontinuity than the connector itself, and it is entirely yours.

Three things dominate it. The via pattern behind the pads — through-hole connector pins leave stubs, and a dense pin field perforates the planes. The antipad geometry, which sets the capacitance at the launch and is the main tuning knob available. And the ground provision: whether each signal pin has a return pin adjacent, and whether that return actually connects to the plane the trace references.

Simulate the launch region in 3D A 2D cross-section solve cannot represent this launch because it is a genuinely three-dimensional structure — vias, antipads, pads and plane cutouts interacting within a few millimetres — and its behaviour cannot be inferred from the trace geometry on either side. Cascade a 3D model of the launch with the vendor's connector model and a 2D model of the trace; that partition matches where each solver is accurate.

What a cable adds

Beyond insertion loss, which is usually the largest single term in any cabled budget, a cable brings impairments a board trace does not:

That last point is why mated-pair variation deserves its own line in a budget rather than being folded into the connector's nominal loss. Two assemblies built from identical parts do not measure identically, and a channel that closes only at nominal will fail somewhere in a production population. Where the specification defines a worst-case connector or cable model, use it — it exists precisely because the nominal one is not the design case.

Why this decides how your board behaves

What to do about it

Model the launch, not just the connector. A channel simulation that inserts a vendor file between two ideal traces is missing the worst part of the structure.

Tune the antipad at the launch. It is the main knob you have: it sets the capacitance at the transition, and it can compensate a via that is otherwise too capacitive. Measure the direction of the error before turning it.

Give every signal pin a usable ground neighbour. Ground provision in the pin map is what decides both the return path and the symmetry of a pair through the connector.

Backdrill through-hole connector pins if the board is thick. A connector pin field in a thick board is a field of stubs, and they are all the same length, so their resonances coincide.

Using this to find a fault
  • Measured channel worse than the vendor's file plus your traces. The launch. It is the part not in either model.
  • Regular ripple in S21. A reflection pair — often the two launches at each end of a connector. The ripple period gives the delay between them, which identifies them.
  • Mode conversion that appears only through the connector. Measure the connector region alone if you can. Pin asymmetry and unequal ground neighbours are the usual causes.
  • A cable assembly that performs differently between units. Cable skew and termination quality vary far more than board features do.
Go deeper — what a cable adds, and why shields are a return-path question

A cable is not a longer trace. Three things behave differently:

  • Loss is lower per unit length but the lengths are longer. A cable's dielectric is usually better than laminate, so dB per metre is favourable — and then somebody uses three metres of it.
  • Skew accumulates. Two conductors in a twisted or parallel pair have slightly different lengths and slightly different surroundings over metres, which is enough to matter. Cable skew is often larger than anything on a board.
  • The shield is part of the circuit. How it is terminated at each end decides where common-mode current flows, and therefore what radiates.

Shield termination is a return-path question in disguise. A shield bonded 360° to the connector shell at both ends gives common-mode current a defined, low-inductance path. A shield connected through a single wire — a pigtail — gives it a high-inductance one, and the shield stops being a shield above the frequency where that inductance dominates. This is the same reasoning as return current paths, applied to a structure that leaves the board.

And a note on where the model ends. Cable assemblies are usually characterised as a whole — connector, cable, connector — which is convenient and hides the boundary you care about. When such a file disagrees with your channel, the first question is what reference plane it was measured to, and whether your board's launch is inside it or outside it. See de-embedding.

In the real world

Connectors are where a channel crosses an organisational boundary, and the electrical problems cluster there for the same reason the organisational ones do: two parties may each model up to their own edge while leaving the interface region without a clearly assigned owner.

The practical remedy is to own the launch explicitly — model it, simulate it with the vendor's file in place, and treat it as part of your design rather than as part of the connector. It is a few hundred mils of board that routinely costs more margin than several inches of trace.

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