SIPI

SIPI / labs

Interactive signal and power integrity labs

Six ways to work a questionChoose a route

These labs let you change a defined model and inspect what it produces. Start with the question you have, then follow the links on the lab page for the explanation and its limits.

The directory is arranged by intent: build intuition, debug a design, or check what a model or measurement can support. The pages describe their own assumptions, so a result is a starting point for a measurement or a better question, not a sign-off.

If you want a known analytical case before exploring freely, use the reference-experiment library. Each entry opens a saved lab scenario and provides the settings, expected values, tolerances, derivations, and limitations in downloadable JSON.

Starting SI/PI

You want to see the basic cause and effect before opening a detailed topic.

  1. Lab A: Transmission-Line Reflections and Energy Flow What voltage and current do along a line when the termination changes?
  2. Lab B: Channel Response, ISI, and Eye Diagrams Relate frequency, impulse, TDR and eye views; inspect discrete impulse weights and trace each sampled decision back to its source symbols.
  3. Lab C: PDN Impedance, Current Sharing, and Transient Droop See which path supplies current at each frequency, then compare signed die-voltage responses from independently timed die and board loads.

Debugging a design

You have a symptom and need a view that helps separate possible causes.

  1. Lab B: Channel Response, ISI, and Eye Diagrams Find the clearest domain for a channel problem, then use the decision table to identify which neighboring symbols help or oppose the selected sample.
  2. Lab A: Transmission-Line Reflections and Energy Flow Where does a reflection travel, and what does the energy account say about it?
  3. Lab C: PDN Impedance, Current Sharing, and Transient Droop Change capacitor banks, compare impedance and branch current, and test how load location and relative timing change die droop.
  4. Lab D: ADC Interference, Aliasing and Reference Noise A reading is noisy or offset and a GPIO is switching nearby: does the disturbance reach the input or the reference, and where does sampling put it?

Checking a model or measurement

You want to know what an output means, and where its evidence stops.

  1. Analytical reference experiments Start from a checked boundary condition or circuit limit, open its scenario, and compare the observation with the documented tolerance.
  2. Touchstone file inspector What does a two-port .s2p file contain, and can this reader trust it?
  3. Real Capacitors: Bias, Tolerance, Temperature, and Mounting What capacitance and impedance are consistent with the part and its mounting assumptions?
  4. Clock recovery and CDR How do jitter transfer, residual phase error and allowable input jitter differ?
  5. Lab D: ADC Interference, Aliasing and Reference Noise What does a converter's SNR figure count as noise, and which interference does the convention hide inside an excluded lobe?

For the full sequence of learning routes, go to Where to start. For the assumptions behind every interactive model, see model contracts.