Fundamentals / 03
Transmission-Line Characteristic Impedance
Put a multimeter on a 50 Ω trace and it will not read 50 Ω. It reads almost zero, or infinity. That is not a faulty meter — Z0 is not a resistance you can measure with a steady voltage. It is the voltage-to-current ratio supported by a travelling wave, set by the geometry and materials around the conductors. On a finite line, the source sees that relationship until information about the termination returns.
Why a wire has an impedance at all
If you have ever put a multimeter across a PCB trace and measured nearly zero ohms, you have already discovered the confusion at the heart of characteristic impedance. The stackup drawing says 50 Ω, but your meter says the trace is a short. Both are correct — they are measuring different things.
A multimeter applies a steady voltage and measures the resulting current. A copper trace is a good conductor, so the steady-state resistance is negligible. Characteristic impedance is not that. It is the ratio of voltage to current in a travelling wave — a relationship that exists only while an edge is propagating down the line and has not yet reached the far end. The driver does not know what is at the far end, so it sees the line's Z0 as its load, and it acts accordingly until information about the termination arrives.
That distinction — a wave property, not a material property — is what makes Z0 depend on geometry (trace width, dielectric thickness, copper distance to the reference plane) rather than on trace length. A 1-inch trace and a 10-inch trace of the same cross-section have the same Z0; only the delay differs.
Start with something uncontroversial. A trace running over a plane has capacitance between the two — two conductors with an insulator between them is the definition of a capacitor. It also has inductance, because current going out along the trace and back along the plane encloses a loop, and any current loop has inductance.
Neither of those is concentrated anywhere. There is no capacitor component and no inductor component; there is a little of each in every millimetre. So we quote them per unit length: so many picofarads per inch, so many nanohenries per inch. Their distributed nature introduces propagation delay and spatially varying voltage and current; those effects are what a lumped RLC model leaves out.
What the signal has to do to move forward
Now follow an edge as it travels. At the wavefront, the trace ahead is still at zero volts and the trace behind has been charged up. To advance by one more millimetre, the signal must do two things at once:
- Charge that millimetre's capacitance to the signal voltage. That takes a certain amount of charge, and charge arriving per second is current.
- Push that current through that millimetre's inductance. Inductance resists a change in current, and that resistance shows up as a voltage.
So the voltage is setting the current (through C) and the current is setting the voltage (through L) — at the same time, everywhere along the line. There is exactly one ratio of voltage to current that satisfies both conditions simultaneously, and that ratio is the characteristic impedance.
This is why the multimeter reads nothing useful. A meter applies a steady voltage and waits. By the time it takes a reading, the wave has long since reached the far end and come back, and what the meter sees is whatever is actually connected there — a short, or an open. Z₀ remains a property of the line, but a DC measurement at the input is dominated by the load after the round-trip delay. Feed a genuinely endless 50 Ω line and it will draw 20 mA per volt indefinitely because no reflection ever returns from a far end.
What moves the number
Every geometry lever works through L and C, and mostly through C. Look at the two cross-sections above while you read these — the field lines are the capacitance.
- Wider trace → lower Z0. More plate area facing the plane, so more capacitance. This is the coarse knob, and the one manufacturing tolerance moves most, because etching is what varies.
- Thicker dielectric → higher Z0. The plane is further away, so there is less capacitance and a bigger current loop — less C and more L, and both push the same way. Moving a signal layer one prepreg further from its reference can shift Z0 by 10 Ω or more.
- Higher Dk → lower Z0. A higher-permittivity insulator stores more charge for the same voltage, so more C. It also slows the wave down, because v depends on the same product.
- A second reference plane → lower Z0. A stripline is loaded capacitively from above and below, so it needs a narrower trace than a microstrip to hit the same impedance.
Differential pairs largely ignore it — PCIe signs off at 85 Ω differential, USB 3.x at 90 Ω, MIPI at 100 Ω. Those numbers did not come from cable history; they came from what the receiver's on-die termination could be built to. Which is the right way round: the termination and the trace have to match each other, and it is the silicon that is hard to change.
Why this decides how your board behaves
Z0 matters for exactly one reason: a wave reflects wherever the impedance changes. Everything else follows from that.
- Termination only works if it matches. A 50 Ω resistor on a 60 Ω trace still reflects about 9% of the incident wave. See reflections.
- Every impedance change is a discontinuity. A via, a connector footprint, a run under a component pad, a place where the reference plane ends — each is a local change in L and C, and each sends part of the signal back. See vias.
- Tolerance is margin you have already spent. Controlled impedance is specified with a window, typically ±10%, sometimes ±7% on a critical layer at a premium. A 10% window on 50 Ω means a trace that could be 45 Ω against an 85 Ω pair partner, and the reflection that follows is in your budget whether you accounted for it or not.
What to do about it
Specify impedance on the fabrication drawing, not the trace width. Width is the fab's variable to solve for. If you fix the width and the fab's prepreg comes in thinner than nominal, you get the width you asked for and the impedance you did not. Give them the target and the tolerance and let them adjust the etch.
Ask which layer the coupon was measured on. Impedance coupons are built on the panel edge and measured by TDR. A stackup with several signal layers does not necessarily hit target on all of them, and the outer layers behave differently from the buried ones because one side of a microstrip is air.
Budget the tolerance rather than the nominal. If the build is ±10%, run the sign-off simulation at both corners. A design that only closes at nominal impedance is a design that will have a yield problem, and the symptom will look like a marginal, temperature- and board-dependent failure rather than an impedance problem.
- A net rings on some boards and not others. Impedance tolerance is one useful candidate, alongside assembly and loading differences. Compare coupon or TDR data from passing and failing boards before changing the termination.
- TDR shows a step, not a spike. A sustained level change means the trace itself is off target — a width or stackup issue. A brief excursion that returns to level is a local discontinuity like a via. The two have entirely different fixes.
- Impedance is right on one layer and wrong on another. Check whether the reference plane for the failing layer is where you think it is. A signal layer referenced to a split plane, or to a plane two dielectrics away, has an impedance that the intended stackup calculation did not cover.
Go deeper — where √(L/C) comes from, and what changes when the line is lossy
The telegrapher's equations describe a line as series impedance and shunt admittance per unit length. In general:
At the frequencies that matter for a digital edge, ωL is far larger than R and ωC far larger than G, so both R and G drop out and the expression collapses to √(L/C). That is the lossless approximation. It is often useful across the frequency range that carries a digital edge when conductor and dielectric loss are small compared with the reactive terms; lossy or dispersive structures require the full expression. Two consequences are worth knowing:
- Z0 is not perfectly flat with frequency. At low frequencies, where R is comparable to ωL, the impedance rises and acquires a phase angle. This is why a TDR trace often shows a slow upward drift along a long lossy trace: the instrument is reporting a real effect, not drifting.
- Above a few GHz, R rises as √f because of the skin effect, but ωL rises as f, so the ratio keeps improving. The lossless approximation gets better with frequency, not worse. See loss mechanisms.
There is also a neat energy argument for √(L/C) that avoids the equations entirely. A wave travelling at velocity v deposits ½CV² of electric energy and ½LI² of magnetic energy in every unit length it passes. For the wave to propagate without changing shape, the two must be equal — otherwise energy would have to move between the electric and magnetic forms as the wave travelled, which would mean the shape changing. Set ½CV² = ½LI² and rearrange: V/I = √(L/C). The wave is the state in which the fields are in balance.
Lastly, the velocity. Because v = 1/√(LC) and the same capacitance that sets Z0 also sets v, the two are not independent. In a uniform dielectric, v = c/√(Dk) — about 170 ps per inch in FR-4 with Dk ≈ 4.2. A microstrip is faster than a stripline on the same board, because part of its field is in air, and its effective Dk is therefore lower than the laminate's. That mixed field is also why microstrip is harder to control and why microstrip crosstalk has a far-end term that stripline does not.
In the real world
The most common impedance problem is not getting the number wrong — it is losing the reference. A carefully controlled 50 Ω trace crossing a gap in its plane is not 50 Ω over the gap, because the return current has nowhere to flow directly beneath it. The stackup drawing says 50 Ω, the coupon measures 50 Ω, and the net still fails, because the impedance of a trace is a property of the trace and its return path together. See return current paths.
The habit worth building: whenever you see an impedance number, ask “referenced to what?” A trace has no impedance on its own. It only has one relative to the conductor its return current is using — and on a real board, that is not always the plane you drew it over.
Related
- When does a trace become a transmission line? — when the number starts to matter
- Transmission-Line Reflections and Ringing — what a mismatch costs
- Return-Current Paths and Reference Continuity — the other half of every impedance
- Differential Signaling and Mode Conversion — odd and even mode impedance
- PCB Manufacturing Variation: Etch, Glass Weave, and Impedance — the window you actually get