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Fundamentals / 02

When does a trace become a transmission line?

A wire becomes a transmission line when the signal comes back before the driver has finished sending it. That is a race between two times — how long the round trip takes, and how long the edge lasts — and it has nothing to do with how many inches long the trace is until you convert those inches into picoseconds.

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Is this trace electrically long? exact T_d critical length you are at verdict
Length vs rise time — the boundary, and where you are
critical lengthtransmission-line regionyour trace
The same rule as two times, side by side
the edgeround trip 2T_d
25 mm
0.5 mm to 500 mm, logarithmic
100 ps
Ask for the fast-strong corner, not typical
Unchecked: microstrip, 147 ps/in — air makes it faster

Two different pictures of the same wire

In every introductory circuits class, wires are perfect. Connect a resistor to a battery with two wires, and Kirchhoff's laws assume the voltage at every point along each wire is the same — instantaneously, everywhere. That is the lumped model, and for DC circuits and low-frequency signals it works beautifully. It is what every schematic implicitly assumes.

But voltage changes do not teleport. A transition at one end of a copper trace travels as an electromagnetic wave at a finite speed — roughly 6 inches per nanosecond in a typical PCB. Until that wave reaches the far end, the far end does not know the driver has switched. For a 10 ns edge on a 1-inch trace, the delay is about 170 ps — negligible. For a 100 ps edge on the same trace, the delay is a significant fraction of the edge itself, and the voltage is measurably different at the two ends of the wire at the same instant.

When that happens, the wire is no longer acting like an ideal connection. It has become a transmission line — a structure with its own impedance, its own propagation delay, and reflections at every point where the impedance changes. The question this page answers is: for your trace length and your edge rate, which picture do you need?

The race that decides it

When the driver switches, an edge sets off down the line. It reaches the far end after one trip time, Td. If the far end is not terminated, it reflects, and arrives back at the driver after 2Td — the round trip.

Now the important part. The driver is not switching instantaneously either; it takes tr to get from low to high. So there are two possibilities:

So the test is a comparison between 2Td and tr. The usual form of it:

treat it as a transmission line when   2Td > tr / 3 T_d is the one-way delay. Rearranged for length: l_crit = t_r / (6 · t_pd), where t_pd is the propagation delay per unit length.

Note that nothing in that expression is a length until you convert it. The same six inches is a plain wire for a 20 ns edge and a badly behaved transmission line for a 100 ps one. A rule quoted in inches with no rise time attached is a rule that happens to be right for one era of silicon.

Putting numbers on it

Propagation delay comes straight from the dielectric the wave travels through: tpd ≈ 84.7 · √Dk,eff ps/inch. A stripline is fully buried, so it sees the laminate's full Dk — around 4.2 for standard FR-4, giving roughly 173 ps/inch. A microstrip has air above it, so its effective Dk is lower, around 3.0, and it runs faster at about 147 ps/inch. Surface traces genuinely are quicker, which is why clock nets sometimes end up on an outer layer.

Feed a 100 ps edge into that: lcrit = 100 / (6 × 173) ≈ 0.1 inch. Two and a half millimetres. Essentially every routed connection on a modern board is electrically long, and the useful question is no longer “is this a transmission line?” — it is “which of these hundreds of transmission lines can I afford not to control?”

Why this decides how your board behaves

Crossing the threshold does not break anything by itself. What it changes is which failures become possible:

What to do about it

Work in picoseconds, not inches. Convert every net's length to delay once, early, and keep the number. 2Td against tr is a comparison you can do in your head; inches against a remembered rule of thumb is not.

Decide by consequence, not by rule. Almost every net is electrically long, so the threshold cannot be your filter. Sort instead by what a reflection would cost: clocks and strobes first, because double clocking is functional; then anything sampled near the edge; then everything with slack to spare. A reset line that rings for 3 ns and is read once at power-up needs nothing.

If it is marginal, slow the edge rather than adding a resistor. Reducing tr is the only lever that moves the threshold itself, and on a control net it is free. See edge rate, not clock rate.

Using this to find a fault
  • Ringing you did not expect. Measure the period of the ringing, not its amplitude. It should be 2Td — twice the one-way delay. Divide by 170 ps/inch and you get a length; if it matches a trace you know, that is the guilty net. If it matches nothing, the resonance is somewhere you have not modelled — a connector, a cable, a package lead.
  • A net that fails only on fast silicon. The board did not change; the edge did. Compare tr between the working and failing parts before looking anywhere else.
  • Ringing that gets worse when you lengthen a trace. Expected, up to a point, then it stops getting worse — because once 2Td is comfortably longer than tr, the overshoot amplitude is set by the reflection coefficients and not by the length at all. If yours keeps getting worse, something else is going on.
Go deeper — where the /3 comes from, and when the rule stops applying

The divisor is a convention, not physics. Some houses use /2, some /6, and the tighter your overshoot specification the more conservative it needs to be. What sets it is how much of the reflected step lands on a settled waveform rather than on a moving one.

If the round trip is a fraction k of the rise time, then the echo arrives when the edge is a fraction k of the way through its transition, and roughly (1 − k) of the reflected amplitude adds to a waveform that is still moving. With 2Td = tr/3, about a third of the echo is absorbed into the edge and two thirds appears as overshoot — which for a typical CMOS driver into an open end is enough to be visible but usually not enough to be a problem. Tighten the rule to /6 and you are asking for the overshoot to be barely visible at all.

Three cases where the rule quietly stops applying:

  • Multi-drop nets. The rule assumes one driver and one receiver on a uniform line. Add taps and every stub becomes its own reflection site with its own round trip. The relevant delay is no longer the end-to-end one.
  • Capacitive loading. A receiver pin is not an open circuit; it is a few picofarads. That capacitance slows the edge locally and lowers the effective impedance of the line near it, which both changes the reflection and makes the measured Td longer than the geometric one.
  • Lossy lines. The rule assumes the echo comes back at full strength. On a long, lossy channel it does not — loss attenuates the round trip twice over, and a 16-inch backplane trace can be electrically very long and still barely ring. This is why loss and reflection trade against each other, and why the worst ringing is usually on short mismatched nets rather than long ones.

A last point about what the threshold does not tell you. Crossing it says reflections are now visible as distinct events. It says nothing about whether they are large. Amplitude is set by the reflection coefficients at the two ends, and those depend on impedances, not on length. A well-matched 20-inch trace is electrically enormous and perfectly quiet; a badly matched half-inch stub at the wrong frequency is short and catastrophic. Length decides whether you see the reflection separately; impedance decides how big it is.

In the real world

The rule's practical value today is not in deciding which nets are transmission lines — they all are — but in giving you a defensible way to say which ones you have chosen not to worry about. That distinction matters at review time. A fixed length rule is easy to state, while “we terminated the nets where a reflection could double-clock a receiver, and here is the list” connects the decision to an observable failure mechanism.

The failure mode to watch for is an unclassified net: a strap, a jumper, a test point, a route to a connector that was added late. Those are the ones that get routed without a reference plane underneath, and they are electrically long for the same reason everything else is.

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