SIPI

SI in practice / 02

Equalization and Clock Recovery: CTLE, FFE, DFE, and CDR

Equalisation is the receiver and transmitter conspiring to undo what the copper did. There are four blocks in the standard toolkit, they fix genuinely different things, and the single most useful thing to know is which cursor each one can reach — because that determines which of them can help with your problem and which cannot.

Best viewed on a laptop or desktop. These panels are built so you can move a slider and watch several charts answer at once. A phone has no room to put them side by side.

The same channel · at the pad, and after the receiver analytical at the pad after EQ improvement decision errors
At the receiver pad — no equalisation
raw channel
After CTLE and DFE
equalised
20 dB
8 dB
Linear — lifts noise and crosstalk too
5 taps
Cancels post-cursor exactly when the prior decisions were right; never touches pre-cursor
Unchecked = ideal cancellation from the known symbols, which no receiver can do. This channel model is noiseless, so decisions only go wrong where the eye is already shut — inject one to see a single error propagate through the taps.

When a multi-gigabit signal travels down a PCB trace, the channel acts as an aggressive low-pass filter. Conductor skin effect and dielectric loss disproportionately swallow the signal's high-frequency harmonics, while low-frequency components pass through with relatively little attenuation. By the time a sharp square wave reaches the far end of an electrical channel with 20 to 30 dB of loss at the Nyquist frequency, its transitions have melted into long, sloping tails that spill across multiple unit intervals. At the sampling latch, these overlapping pulses collide into severe inter-symbol interference (ISI), and the eye diagram closes shut.

Equalisation is the deliberate engineering process of reversing that channel distortion. If the channel attenuates high-frequency energy, an equaliser boosts it; if previous bits leave lingering voltage tails that contaminate the current symbol, an equaliser predicts that residual tail and subtracts it before slicing.

Modern SerDes architectures divide this workload across three complementary stages: TX FFE (feed-forward equalisation at the transmitter), RX CTLE (continuous-time linear equalisation in the receiver's analog front end), and RX DFE (decision feedback equalisation after the decision latch). Understanding why links require all three — rather than simply cranking up one favourite dial — is essential to designing viable multi-gigabit interconnects.

What is actually being undone

Start from what the channel did. A lossy channel attenuates high frequencies, which rounds edges, which spreads each bit's energy across several bit periods. At the sampling instant the receiver sees the bit it wants plus contributions from its neighbours — the cursor, plus pre-cursors and post-cursors. See ISI.

So there are two ways to fix it, and they are genuinely different in kind.

Reshape the waveform so the tails are smaller — boost the frequencies the channel attenuated, and the pulse sharpens. This is filtering, it is linear, and it treats the signal as a waveform without caring what the bits are. A CTLE and an FFE both do this.

Subtract the interference using knowledge of what the bits were. If you know the previous bit was a one, and you know how much tail a one leaves, you can subtract exactly that. This is not filtering — it uses the data, and it is why a DFE can be exact where a linear filter can only approximate.

The four blocks

What “exactly” is doing in that sentence A DFE cancels post-cursor ISI exactly, and the word is load-free only under four conditions. It subtracts what it decided, multiplied by the taps it holds, for as many symbols as it has taps, assuming the channel adds those contributions linearly. So:
  • the prior decisions were right — a wrong one is subtracted with the wrong sign, which injects twice the tap instead of removing it;
  • the taps match the channel — a mis-adapted tap subtracts the wrong amount and leaves a residue of the difference;
  • the tap span covers the memory — whatever post-cursor falls beyond the last tap is untouched;
  • the channel is linear — a compressing driver or a saturating receiver stage breaks the superposition the subtraction assumes.
The first condition has a threshold you can compute. A wrong decision does not merely fail to cancel the post-cursor, it adds one of the opposite sign, so the next sample is disturbed by twice the tap. If that exceeds the cursor — a post-cursor above 0.5 of the main cursor — the next decision flips too, and the error becomes a burst rather than a single slip. Below it the DFE recovers on the following symbol.
The division of labour Pre-cursor is the transmitter's problem, because only the transmitter knows the future. Post-cursor is best handled by the receiver's DFE, because it can cancel exactly rather than amplify. A design that tries to fix everything at one end is spending far more power than one that splits the work.

Which cursor can each one reach?

This is the table that decides which block helps you, and it follows entirely from when each block sees the data.

BlockWherePre-cursorPost-cursorNoise cost
FFEtransmitteryesyeslowers launched amplitude
CTLEreceiver, analogueyesyesamplifies noise and crosstalk
DFEreceiver, after the slicernoexactlydoes not linearly amplify input noise; decision errors propagate

The two bold entries are the whole story. A DFE cannot touch pre-cursors because it works from decided bits, and the bits that cause pre-cursor interference have not arrived yet. An FFE can, because it sits at the transmitter where every bit is known in advance. That asymmetry is why real links use both.

What none of them fix

These limits help distinguish a tuning problem from a channel or noise problem:

There is a corollary the panel above makes uncomfortably visible: more equalisation is not automatically better. Once the DFE has enough taps to cancel the post-cursor exactly, extra CTLE boost costs amplitude without removing ISI that was still there, and the combination can measure worse than the DFE alone. In silicon the CTLE still earns its place — it improves the edge information the CDR runs on, and it lifts the signal before the sampler's own noise — but neither of those appears in a noiseless linear model, and neither is a reason to keep turning the boost up.

A practical diagnostic follows from all of this. If sweeping equaliser settings in simulation produces a broad, flat optimum, smooth loss compensation is likely helping. A sharp optimum, or little improvement across the range, suggests checking for a resonance, crosstalk, noise, model limits, and adaptation behavior before adding more equalisation.

Why this decides how your board behaves

What to do about it

Fix the channel before you equalise it. Equalisation is a budget item with a cost, not a free repair. A backdrilled stub or a shorter route gives margin back with no noise penalty at all.

Match the tool to the cursor. Post-cursor-dominated ISI wants a DFE. Pre-cursor content wants transmitter FFE. Broad smooth loss wants CTLE. Reaching for more CTLE boost when the problem is post-cursor is the common inefficiency.

Check crosstalk with the equaliser on, not off. The interaction is the point. Turn the aggressors up with the CTLE enabled and watch what happens — see what closes the eye.

Report the CDR bandwidth with any jitter number. The loop decides which jitter the receiver tracks out, so two measurements at different bandwidths are not comparable.

Using this to find a fault
  • Equalisation helps far less than predicted. Look for a notch in S21 before adding taps. A resonance is not an equalisation problem.
  • More boost makes it worse. Crosstalk or noise dominated. The CTLE is amplifying the thing that is actually hurting you.
  • Errors arriving in bursts rather than singly. DFE error propagation is a strong suspect, especially if the burst length is close to the number of taps.
  • Adapted settings that sit at a limit. The channel may be consuming the available equaliser range. Confirm convergence, initialization, coefficient quantization, and the reference-receiver definition before treating the limit as channel margin.
Go deeper — why a DFE adds no noise, and what an FFE actually costs

Why the DFE is exact — and why it cannot touch pre-cursors. Sampled at the decision instants, the received value is the wanted bit plus a sum of known coefficients times already-decided symbols: y[n] - Σ dk · â[n - k]. Those symbols â[n - k] are quantized values, not noisy analog estimates, so the post-cursor sum can be subtracted with zero residual. Crucially, because it subtracts a synthesized, noiseless digital reconstruction rather than filtering the incoming analog waveform, the DFE introduces zero high-frequency noise amplification. That is the singular superpower no linear equaliser possesses.

However, the DFE has an absolute structural boundary: it cannot cancel pre-cursor ISI. A decision feedback loop operates causally — it can only feed back decisions that the slicer has already resolved in past clock cycles. It has no access to future bits that have not yet arrived. If a channel suffers from severe pre-cursor dispersion (energy arriving ahead of the pulse peak due to high-frequency phase distortion), the DFE is completely blind to it; pre-cursor ISI must be handled upstream by the TX FFE or RX CTLE.

The other operational price of a DFE is error propagation. When an unexpected noise excursion causes the slicer to make a wrong bit decision, that inverted symbol is fed back into the summer with the wrong sign. Instead of subtracting interference, it adds to it, dramatically increasing the probability that the next symbol will also be decided incorrectly. Consequently, DFE error events are not independent single-bit flips; they arrive in bursts whose duration scales with the tap span of the feedback loop.

What an FFE costs — and how FIR taps work. A transmitter feed-forward equaliser is a discrete-time FIR filter operating on digital symbols before the DAC or driver stage: Vout[n] = c-1·x[n+1] + c0·x[n] + c1·x[n-1] + c2·x[n-2]. The main tap c0 provides the fundamental pulse drive, post-cursor taps (c1, c2) cancel the decaying tail, and the pre-cursor tap (c-1) counteracts leading-edge dispersion. Notice why the transmitter can cancel pre-cursor ISI where the receiver DFE fails: the transmitter's digital buffer holds the upcoming bit stream in a shift register, granting it look-ahead access to future symbols.

A transmitter cannot create voltage out of thin air — its output swing is clamped by the supply rail (Σ |ck| ≤ 1). Therefore, "boosting high frequencies" at the transmitter is mathematically achieved by attenuating low frequencies (de-emphasis) or driving transitions harder while dropping steady-state levels (pre-shoot and de-emphasis):

de-emphasis [dB] = 20·log10( Vtransition / Vsteady ) more equalisation means a smaller steady-state level — high-frequency flatness is bought with overall signal amplitude

This creates an inherent engineering trade-off: over-equalising with TX FFE flattens channel loss but starves the receiver of signal amplitude, dropping the received SNR below the thermal noise floor. A channel that is ISI-limited benefits from aggressive FFE; one that is noise- or crosstalk-limited rapidly degrades with it.

The CTLE zero-pole intuition. A continuous-time linear equaliser is implemented as an active or passive analog filter with a classic one-zero, two-pole transfer function:

H(s) = (1 + sz) / ( (1 + sp1)(1 + sp2) ) the zero provides peaking gain to counteract channel roll-off; the poles clamp out-of-band amplification

The frequency placement of these roots is deliberate:

  • The zero (ωz): Placed well below Nyquist (commonly around 0.2 × fNyquist), initiating the upward gain slope where dielectric loss begins steepening.
  • The first pole (ωp1): Placed near the Nyquist frequency to terminate the peaking slope, establishing the target high-frequency boost (peaking gain, typically 6 to 15 dB).
  • The second pole (ωp2): Placed well above Nyquist to roll off high-frequency amplification, preventing wideband thermal noise and high-frequency crosstalk from swamping the receiver.

Because the CTLE transfer function is continuous and smooth, it can only compensate for smooth, monotonic channel roll-off. It cannot invert narrow reflection notches or stub resonances. Furthermore, any real CTLE imparts minimum-phase group delay distortion; ignoring phase response during simulation yields unphysical, over-optimistic eye openings.

And the CDR is part of the budget. It is not an equaliser, but its loop bandwidth decides which jitter the receiver tracks out: slow wander is followed and effectively removed, fast jitter is not. Jitter numbers are only comparable at the same loop bandwidth, which is why specifications define one.

In the real world

Equalisation has changed what a channel is allowed to look like. A specification that assumes a reference receiver with a defined CTLE and DFE is permitting channels that would have been unusable a generation earlier — and that permission is why the eye at the receiver pad is allowed to be completely closed.

The consequence for day-to-day work is that measuring the analogue eye tells you less than it used to. The meaningful questions are what the adapted settings converged to and how much range they had left, because those help describe margin. An eye image becomes interpretable when it carries the reference plane, equaliser and CDR settings, pattern, population, and receiver criteria.

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