Power Integrity / 02
PDN Target Impedance: Use and Limitations
Target impedance turns a vague requirement — “the rail must stay steady enough” — into a single number you can plot a simulation against. It is one division, and its value is that it gives the PDN a clear screening line. Its limitation is that the division simplifies the load, so the result must be interpreted with the current spectrum, location, and transient duration in mind.
With the load waveform held fixed, will changing capacitor ESR and changing mounting inductance affect the same parts of the response in the same way?
Use this page to establish the screening target, then open Lab C. Change ESR and mounting inductance separately and compare the impedance peak with the transient response.
Target impedance connects a permitted voltage excursion with a specified current change. The rail waveform also depends on the current waveform and where that current is drawn.
For a result you would act on, name the current path, relevant frequency band, stimulus timing, and location. More capacitance does not improve every frequency, and ESR can trade damping against impedance elsewhere.
Turning a requirement into a line on a plot
Power integrity specifications often look intimidating when expressed in frequency-domain plots, but the concept of target impedance is built on elementary physics: Ohm's law. If you model the entire power delivery network as a black-box supply with an internal impedance Z, any sudden demand for current by the load must flow through that impedance. The result is an instantaneous voltage drop across the rail: ΔV = ΔI × Z.
Every digital chip has a strict operating voltage window — typically nominal voltage ±5%. If the supply sags below that boundary, transistors slow down, setup times fail, and logic errors occur. If the rail surges above it, oxide breakdown and reliability hazards threaten the silicon. Keeping the rail within bounds means ensuring that the maximum transient droop ΔV never exceeds the permitted ripple budget. Rearranging Ohm's law gives the maximum impedance the PDN is allowed to present: Ztarget = ΔVmax / ΔIstep.
Suppose you are told the core rail must stay within 5% of 0.75 V. That is a statement about voltage. What you actually control is impedance. To connect them you need the one relationship that holds at every frequency:
Now fix the voltage you will allow and the current you expect, and the impedance you can afford falls straight out. That is the entire derivation, and it is worth noticing how little is assumed: no circuit topology, no frequency, nothing about capacitors. Just a division.
Where the number comes from
Rearrange V = I·Z for the worst case you are willing to accept, and you have the whole derivation:
Be explicit about ± tolerance versus peak-to-peak too — they differ by a factor of two. Recording which convention the budget uses prevents a corresponding factor-of-two error in the target.
And one driving-point impedance is not the PDN. A die has many loads and many observation points; properly it is V = Z·I with Z a multiport matrix, where noise injected at one location appears at another through a transfer impedance. A single Z(f) at one port is a screening tool, and a good one — it is not the whole answer.
Three and three-quarter milliohms across eight decades is a demanding specification, and it does a genuinely useful job: it turns a vague requirement into a curve you can plot a simulation against and see, at a glance, where the design is short. Every PI flow starts here for a reason.
The three assumptions
- A flat current spectrum. Real current can be concentrated at the clock rate and its harmonics, at memory burst rates, and at power-state transition rates. A flat target can spend effort where the load has little energy, while treating a resonance on an activity frequency the same as one between dominant components.
- That the step is the maximum step. The 50%-of-Imax convention is a rule of thumb standing in for a workload. The current step that matters is the largest one that happens fast enough to matter, and for the first droop that is a much smaller number arriving much more quickly.
- One impedance represents the whole die. Local droop depends on the load and observation position. A network that meets target at the package balls can exceed it at a particular location on the power grid.
Target impedance alone says nothing about duration. A narrow impedance peak that is 2× over target may cost you a few millivolts for a few nanoseconds and be acceptable within the full budget, while a broad shallow excess sustained through a long burst may not be. Two curves that cross the same mask by the same margin can therefore produce very different time-domain responses.
Why this decides how your board behaves
- It is the specification everything else is measured against. Every decoupling decision, every stackup choice and every package trade-off gets justified by whether the resulting curve stays under this line.
- Lower voltage and higher current tighten the target. Ztarget falls as voltage falls and current rises, a common combination in modern silicon. A rail at 0.75 V and 20 A is a far harder target than one at 1.8 V and 5 A, by about a factor of ten.
- Missing it does not fail uniformly. Exceeding the target at a frequency the load never excites costs nothing measurable. Exceeding it on a clock harmonic can dominate the whole noise budget. The single line does not distinguish the two.
- It is a screening tool, not a verdict. Passing it is good evidence and not proof; failing it is a reason to look closer, not automatically a defect.
What to do about it
Allocate the tolerance before you divide. The 5% is the total the rail may deviate at the transistor, and several claims are already on it: the regulator's set-point error, any deliberate load-line offset, drift over temperature and life, and the static IR drop from the sense point to the load. Dynamic impedance receives the remainder, which may be substantially smaller than the headline tolerance.
Be explicit about ± versus peak-to-peak. They differ by a factor of two and produce targets that differ by a factor of two. Write the convention beside the budget so the calculation and the requirement use the same definition.
Justify the current step rather than halving the maximum. “Half of Imax” is a convention, not a measurement. The number that matters is the largest step the workload actually produces, and on a modern SoC that is a power-management question — a clock-gate release or a power-state exit, not a slow ramp to maximum.
Follow the screening line with workload context. Once the curve is under it everywhere, compare the impedance against the load's spectrum. See Lab C, which plots both.
- The curve meets target and the rail still misbehaves. Check the current assumption first. Within the linear model, a step larger than budgeted produces noise in direct proportion; compare the assumed and measured load transient before changing the PDN.
- Noise larger than I × Z predicts. Suspect a second source arriving through transfer impedance from another block on the same plane, or a measurement whose ground reference is adding its own loop.
- A rail that fails only under a specific workload. Workload spectrum and sequence are useful discriminators. Find its repetition rates and current transitions, then compare them with the impedance curve and time-domain response.
- Everything passes in simulation and fails on hardware. Compare the models' reference points. A simulation measuring at the package ball and hardware measuring at a board test point are answering different questions.
Go deeper — what "flat from DC" really asks for, and the multiport truth
The formula produces a single number, and the convention is to require it flat across the whole band. That is deliberately conservative, and it is worth knowing what it is standing in for.
A flat impedance requirement is equivalent to assuming the load's current spectrum is flat — that the worst case at every frequency could coincide. Real loads are not flat, so the flat target over-specifies at frequencies where the load is quiet and, more dangerously, remains conservative across the band. That makes it a common and useful screening convention.
The multiport truth. One driving-point impedance is not the PDN. A die has many loads and many observation points, and properly it is V = Z·I with Z a matrix: noise injected at one location appears at another through a transfer impedance. A single Z(f) at one port is a screening tool — a good one — and not the whole answer. Two consequences follow: a rail can pass its own target and still be disturbed by a neighbour, and fixing a peak at one port can move it to another.
Where the linear formula needs a richer model. It assumes the load is a current source independent of the rail. At large droops that breaks down — a lower rail makes the logic slower, which reduces the current it draws, which is a stabilising feedback the linear model has no term for. It also assumes the step is a step. A resonant PDN excited by a repetitive load at its resonant frequency accumulates, and the steady-state amplitude can far exceed the single-step response.
In the real world
Target impedance earns its place by being the thing everyone can agree on early. It can be computed from a specification sheet before any hardware exists, it gives the layout team a constraint they can work to, and it gives the review a line on a plot. That coordination value is worth more than its precision.
The failure to avoid is treating the line as the finish rather than the start. A PDN that meets target everywhere and resonates at the load's dominant frequency has passed the check and failed the job — which is why the curve and the load spectrum belong on the same page.
Related
- Two-load PDN DC reference — constant-current resistor-path values, separate from Lab C’s finite-pulse droop
- Power Delivery Networks: From Regulator to Die
- Decoupling Capacitors: ESR, ESL, and Placement
- VRM Control-Loop Bandwidth and Load Transients
- Reporting Signal and Power Integrity Margin