Power Integrity / 08
Simultaneous Switching Noise and Ground Bounce
“Ground” is a name, not a guarantee. When many outputs switch at once, the current they all share has to flow through the same package and board inductance — and across an inductance, a changing current is a voltage. The chip's local ground momentarily is not the same potential as everyone else's, and every signal referenced to it moves with it.
Where the voltage comes from
In introductory electronics, “ground” is treated as a universal, unshakeable 0 V reference that remains rock-solid everywhere in a circuit. But inside a physical microchip, ground is not a mathematical ideal — it is a physical network of microscopic metal lines, bond wires, package vias, and solder balls. And like all physical conductors, every one of those connections possesses parasitic inductance.
When an entire parallel bus — 16, 32, or 64 output drivers — switches simultaneously on a clock edge, each driver dumps a rapid pulse of current into the return network. Because multiple drivers share the same ground pins and package balls to return that current to the board, their switching currents combine. That rapid, collective change in current (di/dt) rushing through the shared return inductance (L) generates a sudden voltage spike: V = L · di/dt. For a few hundred picoseconds, the chip's internal ground plane is thrown violently off zero, an effect known as ground bounce or simultaneous switching noise (SSN).
There is only one equation behind this page, and it is one you already know: v = L·di/dt. A voltage appears across an inductance whenever the current through it changes.
Now find the inductance. A driver switching a line pulls current from the die, through the bumps, the package planes, the balls, the board, and back. Every one of those is an inductor, and — this is the part that matters — much of that path is shared between many drivers, because they use the same power and ground pins.
So when sixteen outputs switch at the same instant, sixteen current changes add up in that shared inductance, and the voltage that develops appears between the die's local ground and the ground everything else is referenced to. Nothing has gone wrong; this is just what an inductor does.
The reference is not fixed
A driver switching a terminated line pulls current through the die, the bumps, the package planes, the balls and the board, and back. Every one of those has inductance, and much of it is shared between drivers. Across shared inductance, V = L·di/dt — and that voltage appears between the local ground on the die and the ground everyone else thinks they share.
Put numbers on a plausible LPDDR-class case. A DQ driver into a terminated line sources on the order of 13 mA, switching in perhaps 150 ps:
That is the whole mechanism, and it explains its two names. Seen from the ground network it is ground bounce; seen from the supply it is rail collapse; seen from the signal it is a shifted threshold. They are one effect measured at three places.
The quiet line that switches: the classic signature. The most dangerous observable consequence of ground bounce is not what happens to the switching bits, but what happens to a “quiet” line held static. Suppose 31 bits of a 32-bit bus switch from high to low simultaneously, while bit 0 stays held at a steady logic ‘0’. Bit 0's output transistor is fully turned on, holding its external pin firmly to the chip's internal ground rail.
When the other 31 bits fire, the collective return current spikes through the shared package inductance, and the chip's internal ground violently bounces up by 300 to 500 mV. Because bit 0 is clamped to that internal ground, its external pin is dragged upward along with it. To a receiver on the other end of the board whose ground remained at a quiet 0 V, that 400 mV glitch appears as an unprompted pulse. If it crosses the receiver's logic-low threshold (VIL), a quiet control line triggers a false clock edge, a memory read gets corrupted, or a state machine takes a phantom step — while the switching data lines themselves appear perfectly healthy.
Why it hurts twice
SSN does not just add noise — it adds noise that is correlated with the data. The bounce is largest exactly when the most bits switch, which is exactly when the receiver is trying to resolve an edge. It shifts the threshold at the moment of decision, so it converts directly into timing error, and because it depends on the data pattern it behaves like deterministic jitter rather than random noise. A pattern that avoids simultaneous switching will not show it.
The mitigations, in order of how much they move the number:
- More returns, better distributed. Ground balls and bumps interleaved with the signals is the single biggest lever, because it attacks the shared inductance directly.
- Cap the number of simultaneous transitions. Data bus inversion is the lever, and there are two distinct kinds. Transition-based inversion (DBI-AC) counts the bits that would change since the previous cycle and inverts when more than half of them would — which is the one that bounds di/dt, and so the one relevant here. Level-based inversion (DBI-DC) counts the bits that would sit at one level and inverts to balance the termination current, which is a static power and reference-level question rather than a switching one. Both appear in DDR and LPDDR, they are configured separately, and only the first caps simultaneous switching. Which is available, and in which mode, is an edition question — see the claim ledger.
- Slew rate control. Slower edges reduce di/dt proportionally. It costs timing margin, so it is a trade rather than a fix, but it is often the only lever left after layout.
- On-die decoupling near the I/O. Supplies the transient locally so it never crosses the package inductance at all.
Why this decides how your board behaves
- It moves the reference, not just the signal. A receiver compares an input against a threshold derived from its own supply and ground. If those move, every input moves with them — including the quiet ones.
- It is correlated with the data. The bounce is largest exactly when the most bits switch, which is exactly when the receiver is trying to resolve an edge. It is not a random noise source that averages away; it arrives at the worst possible moment by construction.
- A quiet bit is the one that fails. The classic signature: a line held static while its neighbours all switch. It has no signal of its own to ride out the reference moving, so it is where the failure shows.
- It scales with the number switching, not with the rate. Sixteen bits switching together at 100 MHz is worse than one bit at 1 GHz, because di/dt adds.
What to do about it
Reduce the shared inductance. More power and ground pins, distributed among the signals rather than clustered at the edge, so each group of drivers has a shorter and less shared return. This is a package and pinout decision, made very early.
Reduce di/dt. Slower edges, or staggered switching so not everything moves in the same picosecond. Output slew-rate control exists largely for this, and on a wide bus it is the most effective knob you have.
Reduce the number switching together. Data bus inversion is precisely this: if more than half the bits would change, send the complement and flag it. What that bounds depends on which variant is implemented — minimising transitions is the one that targets SSN.
Do not expect board decoupling to help much. The shared inductance is mostly inside the package, and a capacitor on the board is outside it. This is the same inductive fence as everywhere else in PI.
- A static bit that glitches when its neighbours switch. Textbook SSN. Count how many neighbours and in which direction — the failure should track the number switching the same way.
- Failures that depend on the data pattern but not on the channel. If the pattern dependence follows the number of simultaneous transitions rather than run length, it is SSN rather than ISI.
- Noise on the die's ground that board probing cannot see. Expected. The bounce is between the die and the board; measuring on the board measures the wrong side of the inductance.
- Better with a slower driver setting. Strong confirmation — di/dt is the term you changed.
Go deeper — why the peak is π/2 above the mean, and the three names for one effect
The arithmetic above uses the mean slope — total current change divided by transition time. A real edge is not a ramp. For a raised-cosine transition, the instantaneous slope peaks at π/2 times the mean:
That factor matters because the receiver does not average. It sees the instantaneous reference, so the peak is the number that decides whether a bit is read correctly. The panel above plots the peak for exactly this reason.
Three names, one effect. Seen from the ground network it is ground bounce; seen from the supply it is rail collapse; seen from the signal it is a shifted threshold. They are one voltage measured at three places, and the multiplicity of names causes real confusion in debugging — two people can be describing the same measurement and think they disagree.
Why this is a mutual-inductance problem too. The treatment above uses a single shared self-inductance, which is the first-order picture. In a real package the return paths of adjacent drivers are also mutually coupled, so a driver's current induces voltage in its neighbour's loop as well as in the shared one.
Which way that pushes depends on the sign, and the sign depends on the geometry and on what the drivers are doing. The mutual term enters as M·di/dt with a sign set by the relative orientation of the two loops, so:
- Aggressors switching the same direction through loops oriented the same way add — and this is the case that makes SSN grow faster than linearly with aggressor count, and makes a measured number exceed a simple L·di/dt estimate.
- Aggressors switching in opposite directions, or through loops whose orientation opposes, subtract. A differential pair returning through adjacent pins is the deliberate version of this: the mutual term is what makes its net return current nearly zero, which is why differential signalling is kind to a package in the first place.
- Uncorrelated aggressors partially cancel on average, which is why a data bus with a scrambled payload measures below its all-aligned worst case and why compliance patterns are chosen to align the switching on purpose.
So the honest summary is that the uncoupled estimate is neither reliably optimistic nor reliably pessimistic: it is missing a term whose sign you have to work out. If you need the number rather than the mechanism, extract the inductance matrix and let the simulator carry the signs — which is a lumped calculation, not a reason to abandon one.
And why it is a crosstalk problem in disguise. Coupling through a shared return is exactly the mechanism on the return current page, one level up: two signals whose returns share an impedance are coupled through it. SSN is that effect inside a package, with many aggressors and a shared inductance instead of two traces and a plane opening.
In the real world
SSN is the impairment that most often gets misattributed, because it presents as a signal integrity failure on a net that is electrically fine. The trace is the right impedance, the termination is correct, the channel loss is in budget — and the bit still fails, because the thing that moved was the reference.
The discriminating question is always the same: does the failure depend on what the neighbours are doing, rather than on what this net is doing? If it does, stop analysing the net and start counting simultaneous transitions.
Related
- Return-Current Paths and Reference Continuity
- Power-Supply-Induced Jitter: Connecting PI and SI
- LPDDR5 and LPDDR5X Signal Integrity: Timing, ODT, and Training
- BGA Escape Routing and Breakout Congestion
- Lab D: ADC Interference, Aliasing and Reference Noise — where switching noise goes when it reaches an analog reference instead of a receiver