Fundamentals / 08
Capacitive and Inductive Coupling: Voltage Slew vs Current Slew
Noise crosses from one net to another in two ways, and they answer to different things. Capacitive coupling is driven by how fast the aggressor's voltage changes, and it grows with the victim's impedance. Inductive coupling is driven by how much current moves and how fast, and it does not care about the victim node's impedance at all. Which one you see depends on both the aggressor and the victim.
Best viewed on a laptop or desktop. These panels are built so you can move a slider and watch several charts answer at once. A phone has no room to put them side by side.
Two fields, two drivers
Every conductor carrying a signal has two fields around it. The electric field comes from its voltage, and it reaches any nearby conductor through a small mutual capacitance, Cm. The magnetic field comes from its current, and it threads any nearby loop through a mutual inductance, M. Each field only couples when it changes, which is why both kinds of noise appear on edges and nowhere else.
Capacitive coupling follows the voltage slew. A capacitor passes a current i = C·dV/dt, so the aggressor pushes Cm·dV/dt into the victim every time its voltage moves. How much current the aggressor is carrying does not enter at all. That injected current then has to flow through whatever impedance the victim node presents, and the voltage it makes there is that current times the impedance.
Inductive coupling follows the current slew. A changing magnetic flux through a loop induces v = M·dI/dt in it. What matters is how much current moves in the aggressor's loop and how quickly; the aggressor's voltage does not enter. The induced voltage appears in series around the victim's loop, so it does not depend on the impedance of the node you happen to be watching.
The contrast is easy to test in the panel above. Switch to a resistive load and double the load current: the inductive pickup doubles and the capacitive pickup does not move. Double the swing instead, at the same current: the capacitive pickup doubles and the inductive pickup does not move. Lower the victim's impedance: only the capacitive trace shrinks.
Which aggressors are which
Classify an aggressor by what it moves. A lightly loaded GPIO or clock swings its full voltage in a nanosecond but carries little current: it is a dV/dt aggressor. A switching regulator's input loop, a heavily loaded or wide bus, and the ground and supply returns of anything that switches move large currents: they are dI/dt aggressors. One circuit can be both, in different places. A buck converter's switch node slews several volts per nanosecond, while its input loop carries the full switched current. The first couples capacitively into anything nearby; the second couples inductively into any loop that shares its field.
The load decides what the current does. With a resistive load the current follows the voltage, so dI/dt has the same shape as dV/dt: a pulse as long as the edge. With a capacitive load, which is what most GPIOs and clocks actually drive, the current is CL·dV/dt: nothing between edges, and a burst during each one. A 3.3 V output with a 1 ns edge slews 2.64 V/ns, so into 10 pF it draws 26.4 mA for the duration of every edge. The inductive coupling then differentiates that burst again. The victim sees a spike at each corner of the edge, and the spike's shape is set by the victim's loop, not by the aggressor. Choose “Capacitive” in the panel and watch the amber trace turn into spikes.
Which one the victim sees
The victim's impedance is the other half. Capacitive coupling is a small current, so it only makes a large voltage where the node has a high impedance: a reference pin behind a resistor, a PLL loop filter, a crystal, a sensor input. Inductive coupling is a voltage in series with the loop, so it is the one that shows up in low-impedance circuits: supply and ground returns, current-sense lines, terminated signals.
For an aggressor driving a resistive load RL, the current slew is simply dV/dt divided by RL, and the two pickups are equal at one victim impedance:
| High-impedance victim | Low-impedance victim | |
|---|---|---|
| dV/dt aggressor | capacitive, and large. Fix: distance, a grounded shield between them, a lower node impedance, a slower edge. | little of either. The small current finds nowhere to make a voltage. |
| dI/dt aggressor | both can matter. Compare them with Z* above and fix the larger one first. | inductive. Fix: smaller loops, a return path directly under the aggressor, loops at right angles, a slower or more local dI/dt. |
Derivative, then plateau
Capacitive coupling is only a derivative up to a point. The mutual capacitance and the victim node's own capacitance, Cv, form a divider, and once an edge is fast enough to charge the node through that divider before its impedance can drain it, the pickup stops growing and becomes a fixed fraction of the swing, Cm/(Cm + Cv). With 0.5 pF of coupling into a 5 pF node that is 9.1%: a 3.3 V edge can lift the victim by at most 300 mV, however fast it is. The corner between the two regimes is 1/(2π·Z·(Cm + Cv)), which is only 2.89 MHz for a 10 kΩ node. So on a high-impedance node, any nanosecond edge is already on the plateau, and slowing it barely helps. Watch the “2× faster edge” readout for the capacitive path.
Inductive coupling has its own ceiling: the victim loop's own inductance and resistance limit how fast its induced voltage can develop. The panel models it as a 1 GHz loop bandwidth.
Edge rate, in frequency
The lower chart shows why the two couplings respond differently to edge rate. A trapezoidal clock's harmonics fall as 1/n until the edge corner and faster beyond it (see Edge Rate, Not Clock Rate). Differentiating multiplies each harmonic by its frequency. After one derivative, capacitive coupling and inductive coupling into a resistive load, the harmonics stop falling and run level up to the edge corner. After two, inductive coupling into a capacitive load, they rise up to it. Faster edges push that corner, and the energy with it, higher.
That is why edge rate matters so much more for coupling than for the signal itself, but only while the victim's path stays open past the edge corner. For edges 4× faster, a first derivative can add at most 6 dB of pickup power, and a second derivative 12 dB, provided nothing in the path rolls off first. A capacitive path that has already reached its plateau adds almost nothing.
One related mechanism is not on this page: shared-impedance coupling, where two circuits share a piece of return path and one's current develops a voltage across the other's ground. It looks like inductive coupling, and it is fixed differently: give each circuit its own return. It is covered in Simultaneous Switching Noise and Ground Bounce.
Go deeper — the transfer functions, the bounds, and where the lumped picture ends
Capacitive path. Cm drives a node of impedance Rv in parallel with Cv. Writing the charge balance at the node gives a first-order high-pass:
Inductive path. The EMF is M·dI/dt, passed through one pole at the victim loop's bandwidth. With a resistive load, I = V/RL and the path is (M/RL)·s up to the pole: a first derivative of the voltage. With a capacitive load, I = CL·dV/dt and the path is M·CL·s²: a second derivative.
How the panel computes it. Each path is a first-order system, and a trapezoid's slope is piecewise constant, so the steady state is solved exactly, segment by segment: no time step and no truncated series. For a capacitive load, the current steps at each end of the edge, its derivative is an impulse, and the pickup jumps by M·CL·(dV/dt)/τ and then decays with the loop's time constant τ. The spectrum is computed separately, from the transfer functions, and the site's model gate checks that an exact Fourier integral of the time-domain solution reproduces it harmonic by harmonic.
The edge-rate bounds. A first-derivative pickup is a pulse as long as the edge whose height follows the slew, so its energy per edge goes as (dV/dt)² times the edge length, or 1/tr. Four times faster is 10·log 4 = 6.02 dB. A second-derivative pickup is a pulse whose shape the path sets and whose height follows the slew, so its energy goes as (dV/dt)². Four times faster is 20·log 4 = 12.04 dB. Both are reached only while the path is faster than the edge. A harmonic count suggests a larger figure for the second derivative, but that sum diverges without the path's roll-off, and the time-domain picture is the right one.
Telling them apart on the bench. Change the victim's impedance: capacitive pickup scales with it and inductive pickup does not. Change the load current at the same edge: only inductive pickup follows. Move or reroute the victim's return: inductive pickup changes with the loop's area and orientation, and can change sign.
Where this picture ends. Everything here is lumped: the coupled structure is short against the edge (see When Is a Trace a Transmission Line?). Once two long traces run side by side, the coupling is distributed, arrives at both ends at different times, and becomes near-end and far-end crosstalk. And a real path is rarely one clean pole. Bond-wire or package inductance against decoupling capacitance resonates, and a harmonic that lands on the resonance can dominate everything else (see Package Interconnects as Transmission Lines).
Sources. H. W. Ott, Electromagnetic Compatibility Engineering, Wiley, 2009, ch. 2 (capacitive and inductive coupling, and the victim-impedance rule); E. Bogatin, Signal and Power Integrity — Simplified, 3rd ed., Pearson, 2018, the crosstalk chapter.
In the real world
The most common surprise is a converter's reference or input pin next to a GPIO. The GPIO is a dV/dt aggressor and the reference node is high-impedance, so the coupling is capacitive and it sits on the plateau. Slowing the GPIO's edge does little there. Distance, a grounded guard, or a lower-impedance reference (a buffer, or more decoupling right at the pin) do a lot. The same pattern applies to PLL loop filters and crystal pins beside clocks.
The opposite case is a switching regulator's loop beside a current-sense line. A 12 V, 3 A switch with a 5 ns edge moves 0.48 A/ns; through 1 nH of mutual inductance that is 480 mV in the sense loop, while the same edge's capacitive pickup into a 10 Ω sense node is under 10 mV. Here, spacing the traces helps only as far as it reduces M. Shrinking both loops, running the sense pair tightly together, and keeping the regulator's hot loop compact are the fixes.
In packages and ball maps the same reasoning decides pin assignment. A quiet analog pin should not share a high-impedance neighbourhood with a fast output, and a sensitive loop should not share its return with a high-current one. Both are decided before layout, and both are nearly free to get right at that stage.
Related
- PCB Crosstalk: NEXT, FEXT, and Mutual Coupling — the same two mechanisms, distributed along coupled transmission lines
- Edge Rate, Not Clock Rate — where the harmonics come from
- Simultaneous Switching Noise and Ground Bounce — shared-impedance coupling
- Package Interconnects as Transmission Lines — mutual inductance between pins
- Lab D: ADC Interference, Aliasing and Reference Noise — coupling that arrives at a converter's input or reference